JPS6249729B2 - - Google Patents

Info

Publication number
JPS6249729B2
JPS6249729B2 JP53047152A JP4715278A JPS6249729B2 JP S6249729 B2 JPS6249729 B2 JP S6249729B2 JP 53047152 A JP53047152 A JP 53047152A JP 4715278 A JP4715278 A JP 4715278A JP S6249729 B2 JPS6249729 B2 JP S6249729B2
Authority
JP
Japan
Prior art keywords
compound
semiconductor
layer
dielectric layer
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53047152A
Other languages
English (en)
Japanese (ja)
Other versions
JPS53139978A (en
Inventor
Kumaa Paanchori Ranjetsuto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boeing North American Inc
Original Assignee
Rockwell International Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rockwell International Corp filed Critical Rockwell International Corp
Publication of JPS53139978A publication Critical patent/JPS53139978A/ja
Publication of JPS6249729B2 publication Critical patent/JPS6249729B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02241—III-V semiconductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2654—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/084—Ion implantation of compound devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/958—Passivation layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Formation Of Insulating Films (AREA)
JP4715278A 1977-05-11 1978-04-19 Iiiiv compound semiconductor structure and method of growing pure surface stabilizing dielectric layer thereon Granted JPS53139978A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/796,120 US4172906A (en) 1977-05-11 1977-05-11 Method for passivating III-V compound semiconductors

Publications (2)

Publication Number Publication Date
JPS53139978A JPS53139978A (en) 1978-12-06
JPS6249729B2 true JPS6249729B2 (en]) 1987-10-21

Family

ID=25167351

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4715278A Granted JPS53139978A (en) 1977-05-11 1978-04-19 Iiiiv compound semiconductor structure and method of growing pure surface stabilizing dielectric layer thereon

Country Status (2)

Country Link
US (1) US4172906A (en])
JP (1) JPS53139978A (en])

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0280886U (en]) * 1988-12-07 1990-06-21

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4331737A (en) 1978-04-01 1982-05-25 Zaidan Hojin Handotai Kenkyu Shinkokai Oxynitride film and its manufacturing method
US4291327A (en) * 1978-08-28 1981-09-22 Bell Telephone Laboratories, Incorporated MOS Devices
US4246296A (en) * 1979-02-14 1981-01-20 Bell Telephone Laboratories, Incorporated Controlling the properties of native films using selective growth chemistry
US4282043A (en) * 1980-02-25 1981-08-04 International Business Machines Corporation Process for reducing the interdiffusion of conductors and/or semiconductors in contact with each other
US4302278A (en) * 1980-06-16 1981-11-24 Rockwell International Corporation GaAs Crystal surface passivation method
IT1171402B (it) * 1981-07-20 1987-06-10 Selenia Ind Eletroniche Associ Transistor ad effeto di campo a barriera metallo-semiconduttorre conzona svuotata modificata
US4474623A (en) * 1982-04-26 1984-10-02 Raytheon Company Method of passivating a semiconductor body
US4546372A (en) * 1983-04-11 1985-10-08 United Technologies Corporation Phosphorous-nitrogen based glasses for the passivation of III-V semiconductor materials
US4443489A (en) * 1983-05-10 1984-04-17 United Technologies Corporation Method for the formation of phosphorous-nitrogen based glasses useful for the passivation of III-V semiconductor materials
US4634474A (en) * 1984-10-09 1987-01-06 At&T Bell Laboratories Coating of III-V and II-VI compound semiconductors
US4952446A (en) * 1986-02-10 1990-08-28 Cornell Research Foundation, Inc. Ultra-thin semiconductor membranes
US4946735A (en) * 1986-02-10 1990-08-07 Cornell Research Foundation, Inc. Ultra-thin semiconductor membranes
WO1990015436A1 (fr) * 1989-05-31 1990-12-13 Nippon Mining Co., Ltd Procede de production de dispositifs a semi-conducteur composites
CA2099385C (en) * 1990-12-31 2001-10-16 Nick Holonyak Jr. Algaas native oxide
US5262360A (en) * 1990-12-31 1993-11-16 The Board Of Trustees Of The University Of Illinois AlGaAs native oxide
US5327448A (en) * 1992-03-30 1994-07-05 The Board Of Trustees Of The University Of Illinois Semiconductor devices and techniques for controlled optical confinement
US5353295A (en) * 1992-08-10 1994-10-04 The Board Of Trustees Of The University Of Illinois Semiconductor laser device with coupled cavities
ATE165197T1 (de) * 1993-07-20 1998-05-15 Avl List Gmbh Piezoelektrisches kristallelement
US5550081A (en) * 1994-04-08 1996-08-27 Board Of Trustees Of The University Of Illinois Method of fabricating a semiconductor device by oxidizing aluminum-bearing 1H-V semiconductor in water vapor environment
US5902130A (en) * 1997-07-17 1999-05-11 Motorola, Inc. Thermal processing of oxide-compound semiconductor structures
US6599564B1 (en) * 2000-08-09 2003-07-29 The Board Of Trustees Of The University Of Illinois Substrate independent distributed bragg reflector and formation method
JP5082278B2 (ja) * 2005-05-16 2012-11-28 ソニー株式会社 発光ダイオードの製造方法、集積型発光ダイオードの製造方法および窒化物系ｉｉｉ−ｖ族化合物半導体の成長方法
KR100982993B1 (ko) 2008-10-14 2010-09-17 삼성엘이디 주식회사 Ⅲ족 질화물 반도체의 표면 처리 방법, ⅲ족 질화물 반도체및 그의 제조 방법 및 ⅲ족 질화물 반도체 구조물
US8273649B2 (en) 2008-11-17 2012-09-25 International Business Machines Corporation Method to prevent surface decomposition of III-V compound semiconductors
KR102099881B1 (ko) * 2013-09-03 2020-05-15 삼성전자 주식회사 반도체 소자 및 그 제조 방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0280886U (en]) * 1988-12-07 1990-06-21

Also Published As

Publication number Publication date
JPS53139978A (en) 1978-12-06
US4172906A (en) 1979-10-30

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